RESUME

 
 Research
experience​
Technical Skills(HW)
  • FPGA: Altera Cyclone | Actel Igloo

  • PSoC: Xilinx Zedboard

  • Arduino UNO.

  • AVR ATMega Series microcontroller. 

  • Intel 8051 based SoC controllers.

Summer Intern
The University of Toronto,Canada
Mitacs Globalink Research Internship

​June 2015 - August 2015

 

  • Fully-funded internship project, at University of Toronto, Canada for 12 weeks,under supervision of Dr. Roman Genov.

  • Set up a wireless link between a PC, and a brain implant PCB designed for epilepsy detection and termination.

  • Involved developing a custom firmware, in C language, for the USB dongle plugged to a PC, writing Verilog code for the FPGA that controlled the RFIC on brain implant PCB, and MATLAB scripting for real-time plot of recorded brain signals.

     

 

Undergraduate Researcher
VIT University, Vellore, India

​January 2016 - May 2016

 

  • ​Final Year project work, under the supervision of Prof. Boopalan G., in the Communications Lab, VIT University.

  • Involved System level designing and implementation of Software Defined Radio, with a full user-configurable baseband stage.

  • Developed a baseband signal generator for MAX2830 RF front end chipset,using an Altera Cyclone-4 FPGA,  which received digital baseband signals from MATLAB, and designed a digital to analog interface board to feed signals to the RF chipset.

 

 

Carnegie Mellon University,Pittsburgh,USA

Master of Science in Electrical and Computer Engineering

Sept 2016-Dec 2017

VIT University,Vellore,India.

​B.Tech. in Electronics and Communication Engineering

2012 - 2016

CGPA: 9.01(on 10-point scale) .

    Coming here proved to be life changing experience, transforming myself from a not-so-expressive person, to a confident and focussed individual. Developed a strong passion for electronic and computer systems that motivated me to aspire for a career in hardware systems design.

DAV Public School Aundh,Pune,India.

Class 12th CBSE Board Examination.

2010-2012

Percentage: 94.8%

 
City International School Aundh,Pune,India.

Class 10th CBSE Board Examination

2005-2010

Percentage: 96.8%

Education
  • C.

  • Verilog(HDL).

  • Python.

Programming Languages
Technical Skills(SW)
  • Linux

  • Cadence

  • MATLAB

  • NI MultiSIM  |  Proteus ISIS

  • ModelSI

  • COMSOL Multiphysics

For my printable resume , click here

       For my detailed CV, click here 

                            OR 

         Scan the given QR code.

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© 2016 by Shreedutt C. Hegde

 

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